
The Circuit
Episode 38: The Future of Transistor Design and Advanced Packaging
Oct 16, 2023
In this engaging discussion, Huiming Bu, who manages the global semiconductor R&D agenda at IBM Research, shares insights into the future of transistor design. He highlights the exciting shift from FinFET to nanosheet architectures and explores advanced techniques like vertical transport FET and stacked transistors. The conversation also addresses the need for new innovations in 3D chiplet design and the role of major foundries like TSMC and Intel. Finally, Huiming emphasizes the collaborative efforts required to tackle the challenges in meeting the growing demand for computational power.
33:09
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Quick takeaways
- The semiconductor industry is transitioning to nanosheet designs for transistors, enhancing performance and emphasizing the importance of dimensional scaling.
- Effective collaboration among chip designers, foundries, and tool developers is crucial to overcoming challenges in advanced transistor technologies and 3D IC designs.
Deep dives
Transition from FinFET to Nanosheet Technology
The semiconductor industry is transitioning from FinFET transistors to nanosheet designs, which are expected to enhance performance down to 1.5 and 1.7 nanometers. This shift underscores the importance of dimensional scaling, where the concept of contact gate pitch (CGP) has significantly advanced over the past six decades. Alongside this traditional scaling, Design Technology Co-Optimization (DTCO) is becoming increasingly pivotal, accounting for approximately half of the recent advancements in technology nodes. Understanding these transitions is crucial as the industry aims to explore new architectural approaches beyond nanosheets, including innovations like Vertical Transport FETs and stacked transistors.
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