Elad Raz, Co-Founder and CEO at NextSilicon, on Outperforming Nvidia on Efficiency, the Architecture No One Thought Possible, and What Happens When the Memory Bottleneck Breaks

May 6, 2026

Elad Raz, Founder and CEO of NextSilicon and veteran of Unit 8200, talks about reinventing compute with a reconfigurable dataflow chip. He explains why current GPU-centric architectures may be memory-bound, how throughput and token economics shift with memory tiers, and why future models could demand radically different hardware. He also shares NextSilicon’s path into HPC and national-lab deployments.

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ANECDOTE

Bereshit Etched On First 7nm Chip

Elad etched Bereshit on their first 7nm tapeout as a symbolic blessing and design signature.
He consulted a rabbi who suggested Genesis as a word encapsulating past and future meaning for the chip.

INSIGHT

Reconfigurable Dataflow Replaces Von Neumann Bottlenecks

NextSilicon replaces instruction-driven processors by reconfiguring a mesh of arithmetic units so data streams through optimized hardware.
Software autonomously detects computational kernels at runtime and wires transistors to use ~60% of chip transistors instead of ~2%.

INSIGHT

Compute Density Drives 30x Throughput But IO Still Matters

By focusing transistors on arithmetic rather than instruction decoding, NextSilicon claims 30x–100x raw chip throughput for some workloads.
Real-world gains are IO-limited (Amdahl's law) so end-to-end wins depend on memory and data movement too.

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