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Signal Integrity Mastery: Scott McMorrow's PCB Design Revolution
OnTrack: The PCB Design Podcast
Transmission Line Impedance and Plane Parasitic Capacitance
The absence of planes results in V functioning as a high impedance transmission line, but with the introduction of planes, parasitic capacitance from the planes periodically loads the transmission line. As a waveform travels through the transmission line with a specific rise time, the impedance reaches a plateau once it covers the electrical length equivalent to the rise time. To analyze this, six simulations are conducted with varying V sizes (0.2, 0.225, and 0.25) and anti-pad sizes (ranging from 0.6 to 0.9 millimeters) around the pad to determine the impedance for each VIA.
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