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Areas for AI Safety Research
Chip-Level Verification: Research chip-level verification mechanisms to prevent risky training. "doing research on chip level verification mechanisms such that we can try and produce chips that can't be used for certain types of particularly risky training." This could involve monitoring activity, verifying inactivity periods, or implementing restrictions like Nvidia's parallel processing limits. "Nvidia has some restrictions on the way some of their GPUs can be used so that you need to pay extra in order to unlock the ability to run many of them in parallel."
Automated Verification of Training: Develop automated verification methods for machine learning training runs. "automated verification of certain properties of machine learning training runs." This would help verify properties like parameters, training duration, and algorithms used, without revealing sensitive source code. "One way could be for me to like show auditors the actual source code that I'm using for my training run but you know that leaks all sorts of information there are privacy concerns [...]."
Bridging Governance and Technical Expertise: Focus on bridging the gap between governance needs and technical implementation. "the thing I'm trying to do is as I said like build these bridges." Translate governance requirements into concrete technical research directions, facilitating collaboration between governance experts and technical researchers. "like really I want to hand them over to the people who have like way more domain expertise and potentially serve as a bridge [...]."
The cause of increasing complexity and potential risks in AI training necessitates the effect of developing stronger verification and governance mechanisms.