Practical AI Reinforcement learning for chip design
Apr 27, 2020
Anna Goldie, a Google Research expert specializing in natural language processing, and Azalia Mirhoseini, a senior research scientist at Google Brain focusing on hardware-software co-design, dive into the groundbreaking use of reinforcement learning for chip design. They discuss optimizing component placement through advanced techniques, including graph convolutional neural networks. The conversation uncovers the synergy between deep learning and system optimization, and hints at the future implications of AI in revolutionizing the chip design landscape.
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From Device to Chip Placement
- The team initially worked on device placement optimization using reinforcement learning.
- This experience led them to explore chip placement, a significantly more complex problem.
Exploring Different Techniques
- The team experimented with various techniques, including evolutionary strategies and supervised learning.
- Supervised learning helped ground their architecture search and improve generalization.
Importance of Representation
- Generalization depends heavily on finding the right embedding for the input graph.
- A large dataset of placements from various techniques was used to test architectures.