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Episode 284: Using Formal Verification on ZK Systems with Jon Stephens
Zero Knowledge
The Importance of Formal Verification in ZK Circuits
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At Veridys we have developed some custom formal verifiers which help us more efficiently be able to perform the formal verification. There are ways that you can perform formal verification automatically but ZK kind of has some properties that make that difficult and so at this point formal verification is typically a manual process where you have to manually write out the proof. At the same time we have developed tools that use fuzzing in order to help identify problems in ZK circuits by let's say randomly mutating outputs for example. And then finally at Veridy we've also developed static analyzers in order to find bugs within the ZK circuits.
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