The FPGA competition was a little bit unique both and both the prize categories of MSM and NTT which this team competed in it was unique because there wasn't really an existing baseline to go from. I feel like when looking at some of the Z-prize documentation after the fact there was a lot of like increases doubling quadrupling of speeds what happened in the case of the FPGA  the MSM and the NTTYeah so you could parallelize it too much and then your design just won't work or it might work but it will work at one megahertz which is way too slow right yeah.

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