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Episode 284: Using Formal Verification on ZK Systems with Jon Stephens
Zero Knowledge
The Risks of Under Constrained Circuits
People are trying to find that razor edge where it's acceptable but not and not under but also like not too full. The reason why they do that is because proving time often becomes kind of a bottleneck so they want to make their or they want to have as few constraints as possible. One of the most dangerous things is if you have a completely under constrained signal because that completely under constrained signals can now take on any particular value.
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