ZK Hardware Sessions with Zprize Pt. 1
Zero Knowledge
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Parallelize the First Round of a Sum Check
There is definitely a limit in terms of overall sum checks by doing these batch evaluations so I don't think it's a huge killer but it definitely speaks to a new conversation of kind of backwards fitting or retroactively making these zero knowledge premium systems such as specialized in hardware. A nice and easy way to think about it without even understanding like pipes of FPGAs is just field size you spit out in some proving systems on 256 or some 128 bit number. If you were able to do it in a 64 bit field or some some specific field minus one you can basically optimize the hardware that already exists. There's lots of ways to optimize hardware FPGAs with RTL and all of these very
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