Zero ASIC: Custom Chiplets and Faster Assembly

Welcome back, Andreas Olofsson of ZeroASIC!

• Andreas was on the show back in 2015 (ep 254) talking about the Parallela, a crowdfunded parallel calcuation board by his then-company Adapteva
• What is enabling more open source to happen?
  • Unit economics really impact silicon designs
  • Open source effects have been having a positive effect on the industry. Andreas maintains a meta repo of 400 tools.
• Fewer fabs than 2008, mask sets still expensive
• Semiconductor singularity
• Andreas is deep into the world of “chiplets”
• This is the basis of his new company ZeroASIC
• Before he started that he was a program manager at a little outfit called DARPA
• Andreas focused on lowering costs, with the idea that 3 people should be able to design a chip
• He worked under Bill Chappell, the director of the Microsystems Technology Office (MTO)
• OpenROAD
• POSH
• CHIPS
• TinyTapeout
• Andrew Kang UCSD
• Chiplets
• We had Ming Zhang on to tlk about ZGlue, but that was a slightly different architecture
• What is a chiplet?
• AXI on chip
• SERDES
• Types of interconnect
• Organic
• Types of output
• SIP, Chip, SOM
• ZeroASIC is Andreas’ latest company
• They started by releasing a Silicon compiler project
• New thing is take system customers and build them an ASIC
• Optimizing speed and cost
• Mostly targeting aerospace and defense
• Try it out yourself on the ZeroASIC emulation page
• Their main processor is a Quadcore RISC V
• There are no off the shelf chiplets
• eFabric Active Interposer
• Defining a standard
• arm made a standard called amba
• AIB from Intel was opensourced
• Getting external contributors (hardware vs software)
• LatchUp – Fossi
• Personal passion drives people to contribute
• You’re really buying a datasheet from a big company
• Loading the design to AWS
• Check out the ZeroASIC openings
• Read about how ZeroASIC is democratizing chip making